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description the ICX054BL is an interline ccd solid-state image sensor suitable for eia b/w video cameras. compared with the current product icx054al, sensitivity is improved drastically through the adoption of super had ccd technology. this chip features a field period readout system, and an electronic shutter with variable charge-storage time. features high sensitivity (+4db at f8, +2db at f1.2 compared with icx054al) high saturation signal (+1db compared with icx054al) low smear and low dark current excellent antiblooming characteristics continuous variable-speed shutter horizontal register: 5v drive reset gate: 5v drive device structure interline ccd image sensor image size: diagonal 6mm (type 1/3) number of effective pixels: 510 (h) 492 (v) approx. 250k pixels number of total pixels: 537 (h) 505 (v) approx. 270k pixels chip size: 6.00mm (h) 4.96mm (v) unit cell size: 9.6m (h) 7.5m (v) optical black: horizontal (h) direction: front 2 pixels, rear 25 pixels vertical (v) direction: front 12 pixels, rear 1 pixel number of dummy bits: horizontal 16 vertical 1 (even field only) substrate material: silicon ?1 ICX054BL e98223a99 diagonal 6mm (type 1/3) ccd image sensor for eia b/w video cameras sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 16 pin dip (plastic) aaaaa a aaa a a aaa a a aaa a aaaaa pin 1 v 2 25 1 12 pin 9 h optical black position (top view) * super had ccd is a registered trademark of sony corporation. super had ccd is a ccd that drastically improves sensitivity by in troducing newly developed semiconductor technology by sony corporation into sony's high-performance had (hole-accumulation diode) sensor.
? 2 ICX054BL substrate voltage sub ?gnd v dd , v out , v ss ?gnd supply voltage v dd , v out , v ss ?sub v f 1 , v f 2 , v f 3 , v f 4 ?gnd vertical clock input voltage v f 1 , v f 2 , v f 3 , v f 4 ?sub voltage difference between vertical clock input pins voltage difference between horizontal clock input pins h f 1 , h f 2 ?v f 4 h f 1 , h f 2 , rg, v gg ?gnd h f 1 , h f 2 , rg, v gg ?sub v l ?sub v f 1 , v f 2 , v f 3 , v f 4 , v dd , v out ?v l rg ?v l v gg , vss, h f 1 , h f 2 ?v l storage temperature operating temperature pin no. symbol description pin no. symbol description 1 2 3 4 5 6 7 8 v f 4 v f 3 v f 2 v f 1 gnd v gg v ss v out vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock gnd output amplifier gate bias output amplifier source signal output 9 10 11 12 13 14 15 16 v dd gnd sub v l rg nc h f 1 h f 2 output amplifier drain supply gnd substrate (overflow drain) protective transistor bias reset gate clock horizontal register transfer clock horizontal register transfer clock pin description 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 n o t e n o t e ) : p h o t o s e n s o r v o u t v s s v g g g n d v f 1 v f 2 v f 3 v f 4 v d d g n d s u b v l r g n c h f 1 h f 2 h o r i z o n t a l r e g i s t e r v e r t i c a l r e g i s t e r block diagram and pin configuration (top view) item ?.3 to +55 ?.3 to +18 ?5 to +10 ?5 to +20 to +10 to +15 to +17 ?7 to +17 ?0 to +15 ?5 to +10 ?5 to +0.3 ?.3 to +30 ?.3 to +24 ?.3 to +20 ?0 to +80 ?0 to +60 v v v v v v v v v v v v v v c c * 1 ratings unit remarks absolute maximum ratings * 1 +27v (max.) when clock width < 10 s, clock duty factor < 0.1%.
? 3 ICX054BL item v dd v gg v ss v sub ? v sub v rgl ? v rgl v l 14.55 1.75 9.0 ? 1.0 ? 15.0 2.0 * 2 15.45 2.25 18.5 +3 4.0 +3 v v v % v % 5% * 1 * 1 symbol min. typ. max. unit remarks bias conditions dc characteristics grounded with 680 resistor item output amplifier drain current input current input current i dd i in1 i in2 3 1 10 ma a a * 3 * 4 symbol min. typ. max. unit remarks output amplifier drain voltage output amplifier gate voltage output amplifier source substrate voltage adjustment range fluctuation range after substrate voltage adjustment reset gate clock voltage adjustment range fluctuation range after reset gate clock voltage adjustment protective transistor bias * 1 indications of substrate voltage (v sub ) ?reset gate clock voltage (v rgl ) setting value. the setting values of substrate voltage and reset gate clock voltage are indicated on the back of the image sensor by a special code. adjust substrate voltage (v sub ) and reset gate clock voltage (v rgl ) to the indicated voltage. fluctuation range after adjustment is 3%. v sub code one character indication v rgl code one character indication - - v rgl code v sub code code and optimal setting correspond to each other as follows. 1 v rgl code optimal setting 1.0 1.5 2.0 2.5 3.0 3.5 4.0 2 3 4 5 6 7 v sub code optimal setting 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 18.5 e f g h j k l m n p q r s t u v w x y z ?l? ? v rgl = 3.0v v sub = 12.0v * 2 v l setting is the v vl voltage of the vertical transfer clock waveform. * 3 1) current to each pin when 18v is applied to v dd , v out , vss and sub pins, while pins that are not tested are grounded. 2) current to each pin when 20v is applied sequentially to v f 1 , v f 2 , v f 3 and v f 4 pins, while pins that are not tested are grounded. however, 20v is applied to sub pin. 3) current to each pin when 15v is applied sequentially to rg, h f 1 , h f 2 and v gg pins, while pins that are not tested are grounded. however, 15v is applied to sub pin. 4) current to v l pin when 30v is applied to v f 1 , v f 2 , v f 3 , v f 4 , v dd and v out pins or when, 24v is applied to rg pin or when, 20v is applied to v gg , vss, h f 1 and h f 2 pins, while v l pin is grounded. however, gnd and sub pins are left open. * 4 current to sub pin when 55v is applied to sub pin, while pins that are not tested are grounded.
? 4 ICX054BL item readout clock voltage v vt v vh1 , v vh2 v vh3 , v vh4 v vl1 , v vl2 , v vl3 , v vl4 v f v |v vh1 ?v vh2 | v vh3 ?v vh v vh4 ?v vh v vhh v vhl v vlh v vll v f h v hl v f rg v rglh v rgll v f sub 14.55 ?.05 ?.2 ?.0 7.8 ?.25 ?.25 4.75 ?.05 4.5 22.5 15.0 0 0 ?.5 8.5 5.0 0 5.0 23.5 15.45 0.05 0.05 ?.0 9.05 0.1 0.1 0.1 0.5 0.5 0.5 0.5 5.25 0.05 5.5 0.8 24.5 v v v v v v v v v v v v v v v v v 1 2 2 2 2 2 2 2 2 2 2 2 3 3 4 4 5 v vh = (v vh1 +v vh2 ) /2 v vl = (v vl3 + v vl4 ) /2 v f v = v vh n ?v vl n (n = 1 to 4) high-level coupling high-level coupling low-level coupling low-level coupling * 1 low-level coupling horizontal transfer clock voltage reset gate clock voltage substrate clock voltage vertical transfer clock voltage symbol min. typ. max. unit waveform diagram remarks item reset gate clock voltage symbol v rgl v f rg ?.2 8.5 0 9.0 0.2 9.5 v v 4 4 min. typ. max. unit waveform diagram remarks clock voltage conditions * 1 the reset gate clock voltage need not be adjusted when reset gate clock is driven when the specifications are as given below. in this case, the reset gate clock voltage setting indicated on the back of the image sensor has not significance.
? 5 ICX054BL clock equivalent circuit constant item capacitance between vertical transfer clock and gnd c f v1 , c f v3 c f v2 , c f v4 c f v12 , c f v34 c f v23 , c f v41 c f v13 c f v24 c f h1 , c f h2 c f hh c f rg c f sub r 1 , r 3 r 2 , r 4 r gnd r f h r f rg 1500 820 470 230 150 230 47 47 5 320 51 100 15 10 40 pf pf pf pf pf pf pf pf pf pf capacitance between vertical transfer clocks vertical transfer clock series resistor vertical transfer clock ground resistor horizontal transfer clock series resistor reset gate clock series resistor symbol min. typ. max. unit remarks r f h r f h h f 2 h f 1 c f h 1 c f h 2 c f h h v f 1 c f v 1 2 v f 2 v f 4 v f 3 c f v 3 4 c f v 2 3 c f v 4 1 c f v 1 3 c f v 2 4 c f v 1 c f v 2 c f v 4 c f v 3 r g n d r 4 r 1 r 3 r 2 v e r t i c a l t r a n s f e r c l o c k e q u i v a l e n t c i r c u i t h o r i z o n t a l t r a n s f e r c l o c k e q u i v a l e n t c i r c u i t r f r g r g f c f r g r e s e t g a t e c l o c k e q u i v a l e n t c i r c u i t capacitance between horizontal transfer clock and gnd capacitance between horizontal transfer clocks capacitance between reset gate clock and gnd capacitance between substrate clock and gnd
? 6 ICX054BL v vh = (v vh1 + v vh2 )/2 v vl = (v vl3 + v vl4 )/2 v f v = v vh n ?v vl n (n = 1 to 4) v f 1 v f 3 v f 2 v f 4 v v h h v v h v v h l v v h h v v h l v v h 1 v v l 1 v v l h v v l l v v l v v h h v v h 3 v v h l v v h v v h h v v h l v v l 3 v v l v v l l v v l h v v h h v v h h v v h v v h l v v h l v v h 2 v v l h v v l 2 v v l l v v l v v h h v v h h v v h l v v h 4 v v h l v v h v v l v v l h v v l l v v l 4 drive clock waveform conditions (1) readout clock waveform (2) vertical transfer clock waveform i i i i 1 0 0 % 9 0 % 1 0 % 0 % v v t t r t w h t f f m 0 v f m 2
? 7 ICX054BL (3) horizontal transfer clock waveform t r t w h t f 9 0 % 1 0 % t w l v f h v h l (4) reset gate clock waveform p o i n t a t w l v f r g v r g h v r g l + 0 . 5 v v r g l 1 0 % v r g l h r g w a v e f o r m v r g l l h f 1 w a v e f o r m t w h t r t f v rglh is the maximum value and v rgll is the minimum value of the coupling waveform during the period from point a in the above diagram until the rising edge of rg. in addition, v rgl is the average value of v rglh and v rgll . v rgl = (v rglh + v rgll )/2 assuming v rgh is the minimum value during the interval twh, then: v f rg = v rgh ?v rgl
? 8 ICX054BL (5) substrate clock waveform 9 0 % 1 0 0 % 1 0 % 0 % v s u b t r t w h t f f m f m 2 v f s u b clock switching characteristics item readout clock vertical transfer clock horizontal transfer clock horizontal transfer clock horizontal transfer clock reset gate clock substrate clock v t v f 1 , v f 2 , v f 3 , v f 4 h f h f 1 h f 2 f rg f sub 2.3 37 11 1.5 2.5 41 5.6 15 2.0 38 75 42 5.6 79 0.5 12 0.012 0.012 6.5 15 0.5 0.015 * 2 0.5 10 0.012 0.012 4.5 0.25 15 0.5 s s ns s s ns s during readout * 1 during imaging during parallel- serial conversion during drain charge symbol twh min. typ. max. min. typ. max. min. typ. max. min. typ. max. twl tr tf unit remarks * 1 when vertical transfer clock driver cxd1267an is used. * 2 tf 3 tr ?2ns.
? 9 ICX054BL image sensor characteristics (ta = 25 c) item sensitivity saturation signal smear video signal shading dark signal dark signal shading flicker lag s vsat sm sh vdt ? vdt f lag 750 800 900 0.002 0.007 20 25 2 1 2 0.5 mv mv % % % mv mv % % 1 2 3 4 4 5 6 7 8 ta = 60 c zone 0, i zone 0 to ii' ta = 60 c ta = 60 c symbol min. typ. max. unit measurement method remarks zone definition of video signal shading 1 0 9 4 9 2 ( v ) 8 1 0 5 1 0 ( h ) v 1 0 h 8 h 8 v 1 0 e f f e c t i v e p i x e l r e g i o n i g n o r e d r e g i o n z o n e 0 , i z o n e i i , i i '
? 10 ICX054BL image sensor characteristics measurement method measurement conditions 1) in the following measurements, the substrate voltage and the reset gate clock voltage are set to the values indicated on the device, and the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) in the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black (ob) level is used as the reference for the signal output, and the value measured at point [ * a] in the drive circuit example is used. definition of standard imaging conditions 1) standard imaging condition i : use a pattern box (luminance 706cd/m 2 , color temperature of 3200k halogen source) as a subject. (pattern for evaluation is not applicable.) use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter and image at f8. the luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) standard imaging condition ii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. sensitivity set to standard imaging condition i . after selecting the electronic shutter mode with a shutter speed of 1/250s, measure the signal output (vs) at the center of the screen and substitute the value into the following formula. s = vs [mv] 2. saturation signal set to standard imaging condition ii . after adjusting the luminous intensity to 10 times the intensity with average value of the signal output, 200mv, measure the minimum value of the signal output. 3. smear set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjust the luminous intensity to 500 times the intensity with average value of the signal output, 200mv. when the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective h blankings, measure the maximum value vsm [mv] of the signal output and substitute the value into the following formula. 4. video signal shading set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjust the luminous intensity so that the average value of the signal output is 200mv. then measure the maximum (vmax [mv]) and minimum (vmin [mv]) values of the signal output and substitute the values into the following formula. sh = (vmax ?vmin)/200 100 [%] 5. dark signal measure the average value of the signal output (vdt [mv]) with the device ambient temperature 60 c and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 60 250 sm = 100 [%] (1/10v method conversion value) 200 vsm 500 1 1 10
? 11 ICX054BL v l a g ( l a g ) s i g n a l o u t p u t 2 0 0 m v l i g h t f l d s g 1 s t r o b e l i g h t t i m i n g o u t p u t 6. dark signal shading after measuring 5, measure the maximum (vdmax [mv]) and minimum (vdmin [mv]) values of the dark signal output and substitute the values into the following formula. ? vdt = vdmax ?vdmin [mv] 7. flicker set to standard imaging condition ii . adjust the luminous intensity so that the average value of the signal output is 200mv, and then measure the difference in the signal level between fields ( ? vf [mv]). then substitute the value into the following formula. f = ( ? vf/200) 100 [%] 8. lag adjust the signal output value generated by strobe light to 200mv. after setting the strobe light so that it strobes with the following timing, measure the residual signal (vlag). substitute the value into the following formula. lag = (vlag/200) 100 [%]
? 12 ICX054BL 7 1 5 v 5 v x s u b x v 2 x v 1 x s g 1 x v 3 x s g 2 x v 4 h f 2 h f 1 r g 1 0 k 1 0 0 k 1 0 / 1 6 v 0 . 1 4 7 k 2 s a 1 1 7 5 0 . 0 1 c c d o u t 8 . 5 v 3 . 3 / 1 6 v 4 7 / 6 . 3 v 6 8 0 1 0 0 3 . 9 k 2 s k 5 2 3 1 8 0 k 2 7 k 1 / 6 . 3 v 1 m 1 5 0 0 p 0 . 0 1 3 . 3 / 2 0 v 1 0 0 k 1 / 3 5 v 2 2 / 1 6 v 2 2 / 2 0 v c x d 1 2 6 7 a n 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 2 3 4 5 6 7 8 9 1 0 1 2 3 4 5 6 8 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 i c x 0 5 4 ( b o t t o m v i e w ) h f 2 h f 1 n c r g v l s u b g n d v d d v f 4 v f 3 v f 2 v f 1 g n d v g g v s s v o u t [ * a ] v s u b 0 . 1 0 . 1 0 . 1 0 . 1 drive circuit
? 13 ICX054BL spectral sensitivity characteristics (includes lens characteristics, excludes light source characteristics) 9 0 0 8 0 0 7 0 0 6 0 0 5 0 0 w a v e l e n g t h [ n m ] r e l a t i v e r e s p o n s e 1 . 0 0 . 9 0 . 8 0 . 7 0 . 6 0 . 5 0 . 4 0 . 3 0 . 2 0 . 0 0 . 1 1 0 0 0 4 0 0 sensor readout clock timing chart 2 . 0 2 . 5 1 . 5 1 . 2 0 . 3 3 8 . 1 2 . 5 u n i t : s v 1 v 2 v 3 v 4 o d d f i e l d h d v 1 v 2 v 3 v 4 e v e n f i e l d
? 14 ICX054BL 2 4 6 2 4 6 8 1 3 5 1 3 5 7 2 4 2 4 6 1 3 1 3 5 6 5 4 9 2 4 9 1 4 9 2 4 9 1 5 2 0 5 2 5 1 2 3 4 5 1 0 1 5 2 0 2 6 0 2 6 5 2 7 0 2 7 5 2 8 0 f l d v d b l k h d s g 1 s g 2 v 1 v 2 v 3 v 4 c c d o u t c l p 1 drive timing chart (vertical sync)
? 15 ICX054BL h d b l k h 1 h 2 r g x s h p x s h d v 1 v 2 v 3 v 4 c l p 1 s u b 5 0 0 5 0 5 5 1 0 1 2 3 5 1 0 1 5 2 0 2 5 1 2 3 5 1 0 1 5 1 6 1 2 1 2 3 5 1 0 drive timing chart (horizontal sync)
? 16 ICX054BL notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non-chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) soldering a) make sure the package temperature does not exceed 80 c. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a ground 30w soldering iron and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, use a thermal controller of the zero cross on/off type and connect it to ground. 3) dust and dirt protection image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. clean glass plates with the following operation as required, and use them. a) perform all assembly operations in a clean room (class 1000 or less). b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) when a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. do not reuse the tape. 4) installing (attaching) a) remain within the following limits when applying a static load to the package. do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (this may cause cracks in the package.) b) if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. c o m p r e s s i v e s t r e n g t h 5 0 n a a a a a a a a c o v e r g l a s s p l a s t i c p a c k a g e 5 0 n a a a a a a a a 1 . 2 n m a a a a a a a a t o r s i o n a l s t r e n g t h
? 17 ICX054BL c) the adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) the notch of the package is used for directional index, and that can not be used for reference of fixing. in addition, the cover glass and seal resin may overlap with the notch of the package. e) if the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) acrylate anaerobic adhesives are generally used to attach ccd image sensors. in addition, cyano- acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) others a) do not expose to strong light (sun rays) for long periods. for continuous using under cruel condition exceeding the normal using condition, consult our company. b) exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. c) the brown stain may be seen on the bottom or side of the package. but this does not affect the ccd characteristics.
? 18 ICX054BL p a c k a g e s t r u c t u r e 0 . 3 1 6 p i n d i p ( 4 5 0 m i l ) h v 2 . 5 2 . 5 8 . 4 0 . 5 1 . 2 5 . 7 6 . 1 1 0 . 3 1 2 . 2 0 . 1 9 . 5 1 1 . 4 0 . 1 1 1 . 4 3 0 . 2 5 0 t o 9 8 1 1 6 9 2 - r 0 . 5 2 . 5 1 1 . 6 9 . 2 2 . 5 1 . 2 3 . 3 5 0 . 1 5 3 . 1 1 . 2 7 3 . 5 0 . 3 0 . 4 6 0 . 3 1 . 2 7 0 . 6 9 ( f o r t h e f i r s t p i n o n l y ) 1 . a i s t h e c e n t e r o f t h e e f f e c t i v e i m a g e a r e a . 2 . t h e t w o p o i n t s b o f t h e p a c k a g e a r e t h e h o r i z o n t a l r e f e r e n c e . t h e p o i n t b ' o f t h e p a c k a g e i s t h e v e r t i c a l r e f e r e n c e . 3 . t h e b o t t o m c o f t h e p a c k a g e , a n d t h e t o p o f t h e c o v e r g l a s s d a r e t h e h e i g h t r e f e r e n c e . 4 . t h e c e n t e r o f t h e e f f e c t i v e i m a g e a r e a r e l a t i v e t o b a n d b ' i s ( h , v ) = ( 6 . 1 , 5 . 7 ) 0 . 1 5 m m . 5 . t h e r o t a t i o n a n g l e o f t h e e f f e c t i v e i m a g e a r e a r e l a t i v e t o h a n d v i s 1 . 6 . t h e h e i g h t f r o m t h e b o t t o m c t o t h e e f f e c t i v e i m a g e a r e a i s 1 . 4 1 0 . 1 0 m m . t h e h e i g h t f r o m t h e t o p o f t h e c o v e r g l a s s d t o t h e e f f e c t i v e i m a g e a r e a i s 1 . 9 4 0 . 1 5 m m . 7 . t h e t i l t o f t h e e f f e c t i v e i m a g e a r e a r e l a t i v e t o t h e b o t t o m c i s l e s s t h a n 5 0 m . t h e t i l t o f t h e e f f e c t i v e i m a g e a r e a r e l a t i v e t o t h e t o p d o f t h e c o v e r g l a s s i s l e s s t h a n 5 0 m . 8 . t h e t h i c k n e s s o f t h e c o v e r g l a s s i s 0 . 7 5 m m , a n d t h e r e f r a c t i v e i n d e x i s 1 . 5 . 9 . t h e n o t c h e s o n t h e b o t t o m o f t h e p a c k a g e a r e u s e d o n l y f o r d i r e c t i o n a l i n d e x , t h e y m u s t n o t b e u s e d f o r r e f e r e n c e o f f i x i n g . c b a d m b ' ~ ~ ~ p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t p l a s t i c g o l d p l a t i n g 4 2 a l l o y 0 . 9 g package outline unit: mm

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